1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com hv2201 features hvcmos technology for high performance 8 channels of high voltage analog switch 3.3 or 5.0v cmos input logic level 20mhz data shift clock frequency very low quiescent power dissipation (-10a) low parasitic capacitance dc to 50mhz analog signal frequency -60db typical off-isolation at 5.0mhz cmos logic circuitry for low power excellent noise immunity cascadable serial data register with latches flexible operating supply voltages applications medical ultrasound imaging ndt metal ?aw detection piezoelectric transducer drivers inkjet printer heads optical mems modules ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? general description the supertex hv2201 is a low charge injection, 8-channel, high voltage analog switch integrated circuit (ic). the device can be used in applications requiring high voltage switching controlled by low voltage control signals, such as medical ultrasound imaging, piezoelectric transducer drivers, and printers. the hv2201 is an enhanced version of the hv20220. input data is shifted into an 8-bit shift register that can then be retained in an 8-bit latch. to reduce any possible clock feed-through noise, the latch enable bar should be left high until all bits are clocked in. data is clocked in during the rising edge of the clock. using hvcmos technology, this device combines high voltage bilateral dmos switches and low power cmos logic to provide ef?cient control of high voltage analog signals. the device is suitable for various combinations of high voltage supplies, e.g., v pp /v nn : +40v/-160v, +100v/-100v, and +160v/-40v. block diagram d le cl sw 0 d le cl sw 1 d le cl sw 2 d le cl sw 6 d le cl sw 7 cl k din dout la tche s leve l shifter s output sw itche s vn n le cl r vdd gn d vpp 8-bit shif t register low charge injection, 8-channel, enhanced, high voltage analog switch
2 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. parameter value v dd logic supply -0.5v to +7.0v v pp - v nn differential supply 220v v pp positive supply -0.5v to v nn +200v v nn negative supply +0.5v to -200v logic input voltage -0.5v to v dd +0.3v analog signal range v nn to v pp peak analog signal current/channel 3.0a storage temperature -65c to 150c power dissipation: 48-lead lqfp 28-lead plcc 1.0w 1.2w operating conditions sym parameter value v dd logic power supply voltage 3.0v to 5.5v v pp positive high voltage supply 40v to v nn +200v v nn negative high voltage supply -40v to -160v v ih high level input voltage 0.9v dd to v dd v il low-level input voltage 0v to 0.1v dd v sig analog signal voltage peak-to-peak v nn +10v to v pp -10v t a operating free air temperature 0 o c to 70 o c notes: power up/down sequence is arbtrary except gnd must be powered-up ?rst and powered-down last. v sig must be v nn v sig v pp or ?oating during power up/down transition. rise and fall times of power supplies v dd , v pp , and v nn should not be less than 1.0msec. 1. 2. 3. product marking yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packagin g *may be part of top markin g top marking bottom marking y y w w h v 2 2 0 1 f g l l l l l l l l l cccccccc aa a yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packagin g *may be part of top marking top marking bottom marking yyww hv2201pj llllllllll ccccccccccc aaa 48-lead lqfp (fg) 28-lead plcc (pj) pin con?guration 1 48 1 28 4 26 ordering information device package options 48-lead lqfp 7.00x7.00mm body 1.60mm height (max) 0.50mm pitch 28-lead plcc .453x.453in body .180in height (max) .050in pitch hv2201 hv2201fg-g HV2201PJ-G -g indicates the part is rohs compliant (green) 28-lead plcc (pj) (top view) 48-lead lqfp (fg) (top view) package may or may not include the following marks: si or package may or may not include the following marks: si or
3 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com dc electrical characteristics (over operating conditions unless otherwise speci?ed ) r ons small signal switch on-resistance - 30 - 26 38 - 48 i sig = 5.0ma v pp = +40v v nn = -160v - 25 - 22 27 - 32 i sig = 200ma - 25 - 22 27 - 30 i sig = 5.0ma v pp = +100v v nn = -100v - 18 - 18 24 - 27 i sig = 200ma - 23 - 20 25 - 30 i sig = 5.0ma v pp = +160v v nn = -40v - 22 - 16 25 - 27 i sig = 200ma r ons small signal switch on-resistance matching - 20 - 5.0 20 - 20 % i sig = 5.0ma, v pp = +100v, v nn = - 100v r onl large signal switch on-resistance - - - 15 - - - v sig = v pp -10v, i sig = 1.0a i sol switch off leakage per switch - 5.0 - 1.0 10 - 15 a v sig = v pp -10v, v nn +10v v os dc offset switch off - 300 - 100 300 - 300 mv 100k load dc offset switch on - 500 - 100 500 - 500 mv i ppq quiescent v pp supply current - - - 10 50 - - a all switches off i nnq quiescent v nn supply current - - - -10 -50 - - a all switches off i ppq quiescent v pp supply current - - - 10 50 - - a all switches on, i sw = 5.0ma i nnq quiescent v nn supply current - - - -10 -50 - - a all switches on, i sw = 5.0ma i sw switch output peak current - 3.0 - 3.0 2.0 - 2.0 a v sig duty cycly < 0.1% f sw output switching frequency - - - - 50 - - khz duty cycle = 50% i pp average v pp supply current - 4.0 - - 5.0 - 5.5 ma v pp = +40v v nn = -160v all output switches are turning on and off at 50khz with no load - 3.5 - - 3.5 - 3.5 v pp = +100v v nn = -100v - 3.5 - - 3.5 - 4.0 v pp = +160v v nn = -40v i nn average v nn supply curent - 4.5 - - 5.0 - 5.5 ma v pp = +40v v nn = -160v all output switches are turning on and off at 50khz with no load - 3.5 - - 3.5 - 3.5 v pp = +100v v nn = -100v - 3.5 - - 3.5 - 4.0 v pp = +160v v nn = -40v i dd average v dd supply current - 4.0 - - 4.0 - 4.0 ma f clk = 5mhz, v dd = 5.0v i ddq quiescent v dd supply current - 10 - - 10 - 10 a all logic inputs are static i sor data out source current 0.45 - 0.45 0.70 - 0.40 - ma v out = v dd -0.7v i sink data out sink current 0.45 - 0.45 0.70 - 0.40 - ma v out = 0.7v c in logic input capacitance - 10 - - 10 - 10 pf --- sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max
4 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max ac electrical characteristics (over recommended operating conditions: v dd = 5.0v, t r = t f 5ns, 50% duty cycle, c load = 20pf, unless otherwise speci?ed) t sd set up time before le rises 25 - 25 - - 25 - ns --- t wle time width of le 56 - - 56 - 56 - ns v dd = 3.0v 12 - - 12 - 12 - v dd = 5.0v t do clock delay time to data out - 120 - 95 140 - 167 ns v dd = 3.0v - 58 - 40 69 - 85 v dd = 5.0v t wcl time width of cl 55 - 55 - - 55 - ns --- t su set up time data to clock 39 - 47 30 - 58 - ns v dd = 3.0v 16 - 21 10 - 26 - v dd = 5.0v t h hold time data from clock 2 - 2 - - 2 - ns v dd = 3.0 or 5.0v f clk clock frequency - - - 8 - - - mhz v dd = 3.0v - - - 20 - - - v dd = 5.0v t r , t f clock rise and fall times - 50 - 50 - 50 ns --- t on turn on time - 5.0 - - 5.0 - 5.0 s v sig = v pp -10v, r load = 10k t off turn off time - 5.0 - - 5.0 - 5.0 s v sig = v pp -10v, r load = 10k dv/dt maximun v sig slew rate - 20 - - 20 - 20 v/ns v pp = +40v, v nn = -160v - 20 - - 20 - 20 v pp = +100v, v nn = -100v - 20 - - 20 - 20 v pp = +160v, v nn = -40v k o off isolation -30 - -30 -33 - -30 - db f = 5.0mhz, 1.0k/15pf load -58 - -58 - - -58 - f = 5.0mhz, 50 load k cr switch crosstalk -60 - -60 -70 - -60 - db f = 5.0mhz, 50 load i id output switch isolation diode current - 300 - - 300 - 300 ma 300ns pulse width, 2.0% duty cycle c sg(off) off capacitance sw to gnd 5.0 17 5.0 12 17 5.0 17 pf 0v, f = 1.0mhz c sg(on) on capacitance sw to gnd 25 50 25 38 50 25 50 pf 0v, f = 1.0mhz +v spk output voltage spike - - - - 150 - - mv v pp = +40v, v nn = -160v, r load = 50 -v spk - - - - 150 - - +v spk - - - - 150 - - v pp = +100v, v nn = -100v, r load = 50 -v spk - - - - 150 - - +v spk - - - - 150 - - v pp = +160v, v nn = -40v, r load = 50 -v spk - - - - 150 - - qc charge injection - - - 820 - - - pc v pp = +40v, v nn = -160v, v sig = 0v - - - 600 - - - v pp = +100v, v nn = -100v, v sig = 0v - - - 350 - - - v pp = +160v, v nn = -40v, v sig = 0v
5 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com truth table d0 d1 d2 d3 d4 d5 d6 d7 le clr sw0 sw1 sw2 sw3 sw4 sw5 sw6 sw7 l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on x x x x x x x x h l hold previous state x x x x x x x x x h all switches off notes: the eight switches operate independently. serial data is clocked in on the l to h transition of the clk. the switches go to a state retaining their present condition at the rising edge of le. when le is low the shift register data ? ow through the latch. d out is high when data in the shift register 7 is high. shift register clocking has no effect on the switch states if le is high. the clr clear input overrides all other inputs. 1. 2. 3. 4. 5. 6.
6 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com test circuits pp v pp -10v pp pp pp pp pp pp pp v pp -10v l vpp vnn vdd vpp vnn vdd vpp vnn vdd vpp vnn vdd vpp vnn vdd vpp vnn vdd vpp vnn vdd vpp vnn vdd
7 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com typical waveforms da ta in le cl oc k da ta o u t of f on (t yp ) vout 5 0 % 50 % 50 % 50% t wl e t sd t su t h 50% 50 % t of f 50 % t do t on t wc l cl r d n + 1 d n d n - 1 5 0 % 5 0 % 90 % 1 0 %
8 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com pin con?guration 48-lead lqfp - (fg) pin # pin name pin # pin name 1 sw5 25 vnn 2 nc 26 nc 3 sw4 27 nc 4 nc 28 gnd 5 sw4 29 vdd 6 nc 30 nc 7 nc 31 nc 8 sw3 32 nc 9 nc 33 din 10 sw3 34 clk 11 nc 35 le 12 sw2 36 clr 13 nc 37 dout 14 sw2 38 nc 15 nc 39 sw7 16 sw1 40 nc 17 nc 41 sw7 18 sw1 42 nc 19 nc 43 sw6 20 sw0 44 nc 21 nc 45 sw6 22 sw0 46 nc 23 nc 47 sw5 24 vpp 48 nc pin con?guration 28-lead plcc (pj) pin # pin name pin # pin name 1 sw3 15 nc 2 sw3 16 din 3 sw2 17 clk 4 sw2 18 le 5 sw1 19 clr 6 sw1 20 dout 7 sw0 21 sw7 8 sw0 22 sw7 9 nc 23 sw6 10 vpp 24 sw6 11 nc 25 sw5 12 vnn 26 sw5 13 gnd 27 sw4 14 vdd 28 sw4
9 hv2201 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com 48-lead lqfp package outline (fg) 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch symbol a a1 a2 b d d1 e e1 e l l1 l2 dimension (mm) min 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80* 0.50 bsc 0.45 1.00 ref 0.25 bsc 0 o nom - - 1.40 0.22 9.00 7.00 9.00 7.00 0.60 3.5 o max 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* 0.75 7 o jedec registration ms-026, variation bbc, issue d, jan. 2001. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. drawings are not to scale. supertex doc. #: dspd-48lqfpfg version, c101708. 1 seating plane gauge plane l l1 l2 vi ew b vi ew b seating plane top view d d1 e e1 b e side view a2 a a1 note 1 (index area d1/4 x e1/4) 48 note: a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1.
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2009 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 94089 te l: 408-222-8888 www .supertex.com 10 hv2201 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-hv2201 b031109 28-lead plcc package outline (pj) .453x.453in. body, .180in. height (max), .050in. pitch symbol a a1 a2 b b1 d d1 e e1 e dimension (inches) min .165 .090 .062 .013 .026 .485 .450 .485 .450 .050 bsc nom .172 .105 - - - .490 .453 .490 .453 max .180 .120 .083 .021 .032 .495 .456 .495 .456 jedec registration ms-018, variation ab, issue a, june, 1993. drawings not to scale . supertex doc. #: dspd-28plccpj, version a092408. .150 ma x .048/.042 x 45 o 1 .075 ma x 4 26 d d1 e1 e to p v iew vi ew a a a2 a1 seating plane e note 1 (index area) .056/.042 x 45 o base plane .020 min 28 b v iew a b1 horizontal side v iew ve rtical side v iew note 2 .020max (3 places) notes: a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. actual shape of this feature may vary. 1. 2.
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